In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are sent as a whole, on a link with several parallel channels. The communication links across which modern devices talk to one another may be either serial or parallel.
A parallel link transmits several streams of data simultaneously along multiple channels (e.g., wires, printed circuit tracks, or optical fibers); whereas, a serial link transmits only a single stream of data. Although a serial link may seem inferior to a parallel one, since it can transmit less data per clock cycle, it is often the case that serial links can be clocked considerably faster than parallel links in order to achieve a higher data rate.
Several factors allow serial to be clocked at a higher rate. For instance, serial connection requires fewer interconnecting cables (e.g., wires/fibers) and hence occupies less space. The extra space allows for better isolation of the channel from its surroundings. Additionally crosstalk is less of an issue because there are fewer conductors in proximity. In many cases, serial is cheaper to implement than parallel. Many integrated circuits (ICs) have serial interfaces, as opposed to parallel ones, so that they have fewer pins and are therefore less expensive.
Common serial ports, with transmit (TX) and receive (RX) lines, are asynchronous (not synchronous) because there is no control over when data is sent or any guarantee that both sides are running at precisely the same rate. Asynchronous serial connections frequently add extra start and stop bits to each byte help the receiver sync up to data as it arrives. Both sides must also agree on the transmission speed in advance. Slight differences in the transmission rate aren't a problem because the receiver re-syncs at the start of each byte.
A synchronous data bus uses separate lines for data and a clock that keeps both sides in perfect sync. The clock is an oscillating signal that tells the receiver exactly when to sample the bits on the data line. This could be the rising (low to high) or falling (high to low) edge of the clock signal. When the receiver detects that edge, it will immediately look at the data line to read the next bit. Because the clock is sent along with the data, specifying the speed isn't important, although devices will have a top speed at which they can operate.
Serial Peripheral Interface (SPI) is an interface bus commonly used to send data between microcontrollers and small peripherals such as shift registers, sensors, and SD cards. It uses separate clock and data lines, along with a select line to choose the device you wish to talk to. The Serial Peripheral Interface bus (SPI) is a synchronous serial communication interface specification used for short distance communication, primarily in embedded systems.
SPI devices communicate in full duplex mode using a master-slave architecture with a single master. In contrast to devices employing simplex communication whereby data is only pushed in one direction, a full-duplex (FDX) system, or sometimes called double-duplex, allows communication in both directions, and, unlike half-duplex, allows this to happen simultaneously. As an example, land-line telephone networks are full-duplex, since they allow both callers to speak and be heard at the same time. Modern cell phones are also full-duplex.
Master/slave architecture is a model of communication where one device or process has unidirectional control over one or more other devices. In some systems a master is selected from a group of eligible devices, with the other devices acting in the role of slaves. The master device originates the frame for reading and writing. Multiple slave devices are supported through selection with individual slave select (SS) lines.
More specifically, devices communicate using a master/slave relationship, in which the master initiates the data frame, as follows. When the master generates a clock and selects a slave device, data may be transferred in either or both directions simultaneously. In fact, as far as SPI is concerned, data are always transferred in both directions. It is up to the master and slave devices to know whether a received byte is meaningful or not. So a device must discard the received byte in a “transmit only” frame or generate a dummy byte for a “receive only” frame.
Sometimes SPI is called a four-wire serial bus, contrasting with three-, two-, and one-wire serial buses. The SPI may be accurately described as a synchronous serial interface, but it is different from the Synchronous Serial Interface (SSI) protocol, which is also a four-wire synchronous serial communication protocol. But SSI Protocol employs differential signaling and provides only a single simplex communication channel.
SPI devices are useful because the receiving hardware can be implemented as a simple shift register. This is a much simpler (and cheaper) piece of hardware than the full-up UART (Universal Asynchronous Receiver/Transmitter) that asynchronous serial requires.
A more recent advance is the use of single master/multiple slave devices configured into a daisy-chain configuration. However, the inventors of the present disclosure have recognized the need for the greater versatility associated with SPI mode changing at the device and/or register abstraction levels.
This overview is intended to provide an overview of subject matter of the present patent application. It is not intended to provide an exclusive or exhaustive explanation of the invention. Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.